If you have a background in memory controller architecture or embedded memories, we invite you to submit resumes for the following open positions at our Seattle Washington and Burlington Vermont offices.
Mask Design: SRAM Circuit Layout
Full Custom Layout of SRAM Periphery Logic and Array
Design Engineer: SRAM Compiler design
SRAM Netlist Verification, Timing Analysis, Model Development for Verilog and other EDA tool views.
Design Engineer: SRAM Circuit design
Experience required in circuit design and analysis of leading edge SRAM.
Test Engineer: Silicon Verification
Experience required in test development and verification of SRAM test silicon.
Make a difference! Please send your resume to: email@example.com.